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Sunday, October 30, 2011

Direct Memory Access



Direct Memory Access


Interrupt-driven I/O, though more efficient than simple programmed I/O, still requires the active intervention of the processor to transfer data between memory and an I/O module, and any data transfer must traverse a path through the processor. Thus both of these forms of I/O suffer from two inherent drawbacks:
1.        The I/O transfer rate is limited by the speed with which the processor can test and service a device.
2.        The processor is tied up in managing an I/O transfer; a number of instructions must be executed for each I/O transfer.
When large volumes of data are to be moved, a more efficient technique is required: direct memory access (DMA). The DMA function can be performed by a separate module on the system bus or it can be incorporated into an I/O module. In either case, the technique works as follows.When the processor wishes to read or write a block of data, it issues a command to the DMA module, by sending to the DMA module the following information:
Ø  Whether a read or write is requested
Ø  The address of the I/O device involved
Ø  The starting location in memory to read data from or write data to
Ø  The number of words to be read or written
The processor then continues with other work. It has delegated this I/O operation to the DMA module, and that module will take care of it. The DMA module transfers the entire block of data, one word at a time, directly to or from memory without going through the processor.When the transfer is complete, the DMA module sends an interrupt signal to the processor.
The DMA module needs to take control of the bus to transfer data to and from memory. Because of this competition for bus usage, there may be times when the processor needs the bus and must wait for the DMA module. Note that this is not an interrupt; the processor does not save a context and do something else. Rather, the processor pauses for one bus cycle (the time it takes to transfer one word across the bus). The overall effect is to cause the processor to execute more slowly during a DMA transfer when processor access to the bus is required. Nevertheless, for a multiple-word I/O transfer, DMA is far more efficient than interrupt driven or programmed I/O.


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